1. Field of the Invention
The invention relates to a method of manufacturing a semiconductor device such as a lateral, high-breakdown-voltage trench MOSFET that is used in power ICs, etc. In particular, the invention relates to a method of manufacturing a semiconductor device that provides an optimum method of impurity diffusion and an optimum method for burying an oxide in a trench region in a process of forming an offset drain region around the trench region.
2. Description of the Prior Art
Conventionally, various trench techniques have been studied as, for example, capacitor formation techniques in DRAMs, etc. and SOI techniques for device isolation as well as trench gate techniques for discrete MOSFETs. In recent years, proposals have been made in which trench techniques are applied to lateral, high-breakdown-voltage, trench MOSFETs that are used in power ICs, etc.
Among the structures of lateral, high-breakdown-voltage, trench MOSFETs is a structure in which an offset drain region is formed around a trench. The formation of an offset drain region around a trench requires a technique of implanting impurity ions around the trench at an optimum concentration and a technique of burying an insulating film such as an oxide film in a wide trench.
The present inventors filed patent applications relating to a technique of implanting impurity ions around a trench and a technique of burying an oxide in a wide trench, e.g., the Japanese patent application JP-A-2003-37267.
However, for the ion implantation technique for formation of an offset drain region around a trench and the technique of burying an insulating film in a wide trench, there are substantially no effective proposals or reports except the proposals of the inventors. Even the method that is disclosed in JP-A-2003-37267 has room for further improvement.